Category Archives: Uncategorized

Hi, My name is Abdurrashid Sanka, a new PhD Student supervised by Dr. Ray. I am quite happy to join CALAS group as a new member. I hail from Kano State Nigeria and had my masters on  embedded microelectronics and … Continue reading →

Our paper entitled “High-speed Discrete Gaussian Sampler with Heterodyne Chaotic Laser Inputs” has been accepted by IEEE Transactions on Circuits and Systems II. It was a collaborating work with Optoelectronics Laboratory, which aimed to build a time-invariant high-speed laser-FPGA system to … Continue reading →

Mr. David Hu, Mr. Yao Liu and Mr. Winston Dai have been granted the captioned Award in recognition of their outstanding academic performance in their research studies in the last twelve months. Congratulations to them!

 Vic and Jack attended a national VLSI competition in Beijing and got third prize. Hope we can win a better prize in the next year.

Our paper  “Towards Practical Code Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware”  has been accepted for publication in the IEEE Transactions on Circuits and Systems I.

Our paper “Spectral Arithmetic in Montgomery Modular Multiplication” has been accepted for publication in the Journal of Cryptographic Engineering.

Our paper “Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication” has been accepted for publication in the IEEE Transactions on Computers.

Our paper  “Compact Constant Weight Coding Engines for the Code Based Cryptography”  has been accepted for publication in the IEEE Transactions on Circuits and Systems II.

Our paper  “Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware”  has been accepted for publication in the IEEE Transactions on Computers.

Our paper  “A Fully Pipelined Hardware Architecture for Intra Prediction of HEVC”  has been accepted for publication on IEEE Transactions on Circuits and Systems for Video Technology.  In this work, we proposed multiple techniques for the hardware architecture for intra prediction … Continue reading →