Poster Papers

Yao Liu, Ray C. C. Cheung, Hei Kiu Wong, “Lightweight Secure Processor Prototype on FPGA”, 28th International Conference on Field Programmable Logic and Applications (FPL),2018

R.C.C. Cheung and A. Brown, “A Scalable System-on-a-chip Architecture for Prime Number Validation”, in the IEE SoC Design, Test and Technology Postgraduate Seminar, Loughborough, United Kingdom, 2004. | PDF

R.C.C. Cheung, “A System on Chip Design Framework for Prime Number Validation using Reconfigurable Hardware”, in the International Conference on Field Programmable Logic and Applications (FPL) (PhD Forum), LNCS 3203, pp. 1186-1187, Antwerp, Belgium, 2004.

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