Donald’s Paper Has Been Accepted by IEEE Transactions on Computers

Our paper  “Parameter space for the architecture of FFT-based Montgomery modular multiplication”  has been accepted for publication in the IEEE Transactions on Computers.  In this paper, a systematic parameter selection method is proposed for efficient FFT-based Montgomery modular multiplication implementation. The architecture prototypes have better performance in terms of latency and area-latency product over the state-of-the-art when the operand sizes are larger than 3000-bit.

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