CALAS

Our paper  “Parameter space for the architecture of FFT-based Montgomery modular multiplication”  has been accepted for publication in the IEEE Transactions on Computers.  In this paper, a systematic parameter selection method is proposed for efficient FFT-based Montgomery modular multiplication implementation. The architecture prototypes have better performance in terms of latency and area-latency product over the state-of-the-art when the operand sizes are larger than 3000-bit.

Our paper  “Fast and Generic Inversion Architectures over GF(2m) Using Modified Itoh-Tsujii Algorithms”  has been accepted for publication in the IEEE Transactions on Circuits and Systems II. We have proposed in this paper two novel architectures for multiplicative inverse over GF(2^m), which enhance  both  speed and  area-time product  of  the circuits compared with the state-of-arts.

Our paper, “A Fast CU Size Decision Algorithm for HEVC Intra Encoder”, has been accepted  for publication in IEEE Transactions on  Circuits and Systems for Video Technology (TCSVT) which is a top journal in the field of video technology and systems. The accepted paper proposed a fast block partitioning algorithm for High Efficient Video Coding (HEVC) standard.